module mod_19(rst,clk,cout,cout1,cout2,m,n);
input clk,rst;
output cout,cout1,cout2,m,n;
reg [5:0] m;
reg [5:0] n;
wire cout;
reg cout1,cout2;

assign cout =cout1|cout2;

always@(posedge clk)
begin
	if(!rst)
	begin cout1<=0; m<=0; end
	else 
		begin 
			if(m ==18) m<=0;
			else m<=m+1;
			if(m == 17) cout1<=~cout1;
			else if(m == 8) cout1<=~cout1;
		end
end
always@(negedge clk)
begin
	if(!rst)
	begin cout2<=0; n<=0; end
	else 
		begin 
			if(n==18) n<=0;
			else n<=n+1;
			if(n == 17) cout2 <= ~cout2;
			else if(n == 8) cout2<= ~cout2;
		end
end
endmodule